heyoka.llvm_multi_state

class heyoka.llvm_multi_state

LLVM multi state class.

This class encapsulates a set of LLVM IR modules together with the options used to compile them. All modules in an llvm_multi_state are compiled with the same set of options.

The compilation caches are managed via the static methods of llvm_state.

Methods

Attributes

bc	The bitcode of the modules.
code_model	The code model used during compilation.
fast_math	The fast math setting employed during compilation.
force_avx512	Flag indicating whether the use of AVX-512 registers was forced during compilation.
ir	The intermediate representations (IR) of the modules.
object_code	The object code of the modules.
opt_level	The optimisation level employed during compilation.
parjit	Flag indicating whether parallel JIT compilation was enabled.
slp_vectorize	Flag indicating whether the LLVM SLP vectorizer was enabled during compilation.

property bc

The bitcode of the modules.

Type:

list[bytes]

property code_model

The code model used during compilation.

Type:

code_model

property fast_math

The fast math setting employed during compilation.

This flags indicates if optimisations which may improve floating-point performance at the expense of accuracy and/or strict conformance to the IEEE 754 standard were employed during compilation.

Type:

bool

property force_avx512

Flag indicating whether the use of AVX-512 registers was forced during compilation.

Currently heyoka.py’s default is to disable the use of AVX-512 registers on all Intel processors and to enable it on AMD Zen 4 and later processors. This flag indicates whether the default heuristic was overridden, forcing the use of AVX-512 registers. On processors without AVX-512 instructions, this flag has no effect.

Type:

bool

property ir

The intermediate representations (IR) of the modules.

Type:

list[str]

property object_code

The object code of the modules.

Type:

list[bytes]

property opt_level

The optimisation level employed during compilation.

The returned value is in the [0, 3] range.

Type:

int

property parjit

Flag indicating whether parallel JIT compilation was enabled.

Type:

bool

property slp_vectorize

Flag indicating whether the LLVM SLP vectorizer was enabled during compilation.

The SLP vectorizer can improve performance in some situations, but it results in longer compilation times.

Type:

bool